Repositories list

• XiangShan

  Public

  OpenXiangShan/XiangShan’s past year of commit activity
  Open-source high-performance RISC-V processor

  chiselrisc-vmicroarchitecture

  Scala

  •

  Mulan Permissive Software License, Version 2

  •867•6.9k•22•116•Updated Feb 4, 2026Feb 4, 2026

• difftest

  Public

  OpenXiangShan/difftest’s past year of commit activity
  Modern co-simulation framework for RISC-V CPUs

  C++

  •

  Mulan Permissive Software License, Version 2

  •93•171•7•10•Updated Feb 4, 2026Feb 4, 2026

• GEM5

  Public

  OpenXiangShan/GEM5’s past year of commit activity
  C++

  •

  BSD 3-Clause "New" or "Revised" License

  •66•125•19•63•Updated Feb 4, 2026Feb 4, 2026

• HBL2

  Public
  Open-source non-blocking L2 cache, used in XS-AI system

  Scala

  •

  Other

  •32•2•0•0•Updated Feb 4, 2026Feb 4, 2026

• XSPdb

  Public archive

  OpenXiangShan/XSPdb’s past year of commit activity
  XSPdb is a Python-based extension of pdb designed for the XiangShan IP, providing GDB-like "interactive debugging" capabilities.

  Python

  •

  Mulan Permissive Software License, Version 2

  •3•9•1•1•Updated Feb 4, 2026Feb 4, 2026

• XiangShan-doc

  Public
  Documentation for XiangShan

  Markdown

  •

  Creative Commons Attribution 4.0 International

  •151•432•7•5•Updated Feb 4, 2026Feb 4, 2026

• YunSuan

  Public

  OpenXiangShan/YunSuan’s past year of commit activity
  This repo includes XiangShan's function units

  Scala

  •

  Mulan Permissive Software License, Version 2

  •15•29•0•1•Updated Feb 4, 2026Feb 4, 2026

• MCSim

  Public
  C++

  •

  Mulan Permissive Software License, Version 2

  •1•3•0•0•Updated Feb 4, 2026Feb 4, 2026

• nexus-am

  Public

  OpenXiangShan/nexus-am’s past year of commit activity
  C

  •48•42•8•7•Updated Feb 3, 2026Feb 3, 2026

• XiangShan-Design-Doc

  Public

  OpenXiangShan/XiangShan-Design-Doc’s past year of commit activity
  Documentation for XiangShan Design

  Markdown

  •

  Creative Commons Attribution 4.0 International

  •17•41•3•6•Updated Feb 3, 2026Feb 3, 2026

• CoupledL2

  Public

  OpenXiangShan/CoupledL2’s past year of commit activity
  Open-source non-blocking L2 cache

  Scala

  •

  Other

  •32•52•0•23•Updated Feb 3, 2026Feb 3, 2026

• XSAI

  Public

  OpenXiangShan/XSAI’s past year of commit activity
  A fork of Xiangshan for AI

  Scala

  •

  Mulan Permissive Software License, Version 2

  •867•36•6•0•Updated Feb 3, 2026Feb 3, 2026

• YuQuan

  Public

  OpenXiangShan/YuQuan’s past year of commit activity
  Scala

  •

  Mulan Permissive Software License, Version 2

  •6•51•1•0•Updated Feb 2, 2026Feb 2, 2026

• qemu

  Public
  Official QEMU mirror. Please see https://www.qemu.org/contribute/ for how to submit changes to QEMU. Pull Requests are ignored. Please only use release tarballs…

  C

  •

  Other

  •6.5k•3•0•2•Updated Feb 2, 2026Feb 2, 2026

• tutorial

  Public

  OpenXiangShan/tutorial’s past year of commit activity
  XiangShan Tutorial Website

  Markdown

  •

  Creative Commons Attribution 4.0 International

  •0•5•0•0•Updated Jan 30, 2026Jan 30, 2026

• MemoryTools

  Public

  OpenXiangShan/MemoryTools’s past year of commit activity
  SystemVerilog

  •1•2•0•0•Updated Jan 30, 2026Jan 30, 2026

• bootcamp

  Public
  XiangShan bootcamp

  Jupyter Notebook

  •

  Creative Commons Attribution 4.0 International

  •1•3•0•0•Updated Jan 30, 2026Jan 30, 2026

• env-scripts

  Public
  Scripts for XiangShan

  Tcl

  •20•17•0•3•Updated Jan 30, 2026Jan 30, 2026

• NEMU

  Public
  Super fast RISC-V ISA emulator for XiangShan processor

  risc-vrisc-v-emulator

  C

  •

  Other

  •121•308•21•13•Updated Jan 30, 2026Jan 30, 2026

• ready-to-run

  Public

  OpenXiangShan/ready-to-run’s past year of commit activity
  Shell

  •13•9•3•1•Updated Jan 30, 2026Jan 30, 2026

• opensbi

  Public

  OpenXiangShan/opensbi’s past year of commit activity
  RISC-V Open Source Supervisor Binary Interface

  C

  •

  Other

  •650•3•0•0•Updated Jan 28, 2026Jan 28, 2026

• llvm-project

  Public

  OpenXiangShan/llvm-project’s past year of commit activity
  The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.

  LLVM

  •

  Other

  •16k•0•0•0•Updated Jan 28, 2026Jan 28, 2026

• Utility

  Public

  OpenXiangShan/Utility’s past year of commit activity
  Scala

  •24•15•0•6•Updated Jan 27, 2026Jan 27, 2026

• edk2

  Public

  OpenXiangShan/edk2’s past year of commit activity
  EDK II

  C

  •

  Other

  •3k•0•0•0•Updated Jan 27, 2026Jan 27, 2026

• edk2-platforms

  Public

  OpenXiangShan/edk2-platforms’s past year of commit activity
  EDK II sample platform branches and tags

  C

  •

  Other

  •591•0•0•0•Updated Jan 27, 2026Jan 27, 2026

• riscv-linux

  Public
  RISC-V Linux Port

  C

  •

  Other

  •216•6•0•0•Updated Jan 27, 2026Jan 27, 2026

• xs-env

  Public

  OpenXiangShan/xs-env’s past year of commit activity
  XiangShan Frontend Develop Environment

  Shell

  •

  Other

  •65•68•3•0•Updated Jan 26, 2026Jan 26, 2026

• ChiselAIA

  Public

  OpenXiangShan/ChiselAIA’s past year of commit activity
  RISC-V AIA in Chisel

  chiselriscvinterrupt+ 1aia

  Scala

  •

  Mulan Permissive Software License, Version 2

  •3•10•11•2•Updated Jan 26, 2026Jan 26, 2026

• riscv-isa-sim

  Public
  Spike, a RISC-V ISA Simulator

  C

  •

  Other

  •1k•10•0•1•Updated Jan 22, 2026Jan 22, 2026

• ChiselIOPMP

  Public

  OpenXiangShan/ChiselIOPMP’s past year of commit activity
  An open-sourced Chisel implementation of the RISC-V I/O Physical Memory Protection (IOPMP).

  Scala

  •

  Mulan Permissive Software License, Version 2

  •0•1•0•0•Updated Jan 19, 2026Jan 19, 2026