From 1b474fc7b71389fcbfb35a7eafae8184e1a00ef8 Mon Sep 17 00:00:00 2001 From: Changyuan Lyu Date: Tue, 10 Mar 2026 13:11:02 -0700 Subject: [PATCH] fix(board): add CMOS and fw_dbg only for firmware boot Signed-off-by: Changyuan Lyu --- alioth-cli/src/boot/boot.rs | 6 ++++++ alioth/src/board/board_x86_64/board_x86_64.rs | 8 +------ alioth/src/vm/vm.rs | 21 +++++++++++++++++-- 3 files changed, 26 insertions(+), 9 deletions(-) diff --git a/alioth-cli/src/boot/boot.rs b/alioth-cli/src/boot/boot.rs index eba2c29c..11150c14 100644 --- a/alioth-cli/src/boot/boot.rs +++ b/alioth-cli/src/boot/boot.rs @@ -359,6 +359,12 @@ fn create(hypervisor: &H, config: Config) -> Result, a vm.add_pvpanic()?; } + #[cfg(target_arch = "x86_64")] + if config.payload.firmware.is_some() { + vm.add_cmos()?; + vm.add_fw_dbg()?; + } + #[cfg(target_arch = "x86_64")] if config.payload.firmware.is_some() || !config.fw_cfg.is_empty() { vm.add_fw_cfg(config.fw_cfg.into_iter())?; diff --git a/alioth/src/board/board_x86_64/board_x86_64.rs b/alioth/src/board/board_x86_64/board_x86_64.rs index ef2d71c4..521e4396 100644 --- a/alioth/src/board/board_x86_64/board_x86_64.rs +++ b/alioth/src/board/board_x86_64/board_x86_64.rs @@ -29,13 +29,10 @@ use zerocopy::{FromZeros, IntoBytes}; use crate::arch::cpuid::{Cpuid1Ecx, CpuidIn}; use crate::arch::layout::{ BIOS_DATA_END, EBDA_END, EBDA_START, IOAPIC_START, MEM_64_START, PORT_ACPI_RESET, - PORT_ACPI_SLEEP_CONTROL, PORT_ACPI_TIMER, PORT_CMOS_REG, PORT_FWDBG, RAM_32_SIZE, + PORT_ACPI_SLEEP_CONTROL, PORT_ACPI_TIMER, RAM_32_SIZE, }; use crate::arch::msr::{IA32_MISC_ENABLE, MiscEnable}; use crate::board::{Board, BoardConfig, CpuTopology, PCIE_MMIO_64_SIZE, Result, VcpuGuard, error}; -use crate::device::clock::SystemClock; -use crate::device::cmos::Cmos; -use crate::device::fw_dbg::FwDbg; use crate::device::ioapic::IoApic; use crate::firmware::acpi::bindings::{ AcpiTableFadt, AcpiTableHeader, AcpiTableRsdp, AcpiTableXsdt3, @@ -446,9 +443,6 @@ where pub fn arch_init(&self) -> Result<()> { let io_apic = self.arch.io_apic.clone(); self.mmio_devs.write().push((IOAPIC_START, io_apic)); - let mut io_devs = self.io_devs.write(); - io_devs.push((PORT_CMOS_REG, Arc::new(Cmos::new(SystemClock)))); - io_devs.push((PORT_FWDBG, Arc::new(FwDbg::new()))); Ok(()) } } diff --git a/alioth/src/vm/vm.rs b/alioth/src/vm/vm.rs index 386a854a..69b2e630 100644 --- a/alioth/src/vm/vm.rs +++ b/alioth/src/vm/vm.rs @@ -26,12 +26,15 @@ use snafu::{ResultExt, Snafu}; #[cfg(target_arch = "aarch64")] use crate::arch::layout::{PL011_START, PL031_START}; #[cfg(target_arch = "x86_64")] -use crate::arch::layout::{PORT_COM1, PORT_FW_CFG_SELECTOR}; +use crate::arch::layout::{PORT_CMOS_REG, PORT_COM1, PORT_FW_CFG_SELECTOR, PORT_FWDBG}; use crate::board::{Board, BoardConfig}; -#[cfg(target_arch = "aarch64")] use crate::device::clock::SystemClock; #[cfg(target_arch = "x86_64")] +use crate::device::cmos::Cmos; +#[cfg(target_arch = "x86_64")] use crate::device::fw_cfg::{FwCfg, FwCfgItemParam}; +#[cfg(target_arch = "x86_64")] +use crate::device::fw_dbg::FwDbg; #[cfg(target_arch = "aarch64")] use crate::device::pl011::Pl011; #[cfg(target_arch = "aarch64")] @@ -160,6 +163,20 @@ where Ok(()) } + #[cfg(target_arch = "x86_64")] + pub fn add_cmos(&self) -> Result<(), Error> { + let mut io_devs = self.board.io_devs.write(); + io_devs.push((PORT_CMOS_REG, Arc::new(Cmos::new(SystemClock)))); + Ok(()) + } + + #[cfg(target_arch = "x86_64")] + pub fn add_fw_dbg(&self) -> Result<(), Error> { + let mut io_devs = self.board.io_devs.write(); + io_devs.push((PORT_FWDBG, Arc::new(FwDbg::new()))); + Ok(()) + } + #[cfg(target_arch = "aarch64")] pub fn add_pl011(&self) -> Result<(), Error> { let irq_line = self.board.vm.create_irq_sender(1)?;